IBM Design Engineer - Manual Layout in HOPEWELL JUNCTION, New York
Be part of a dynamic and skilled IBM Research team developing test structure design enablement for the world’s most advanced semiconductor technologies. Job responsibilities include: Develop manual layout per specified requirements, using industry standard (EDA) tools include the Cadence Virtuoso Design Environment. Ensure that designed layouts pass Design Rule Checks (DRC). Specified layouts will be primarily test structures rather than working circuitry. Close and frequent cooperation with development engineers will be required.Preferred work location is Hopewell Junction NY. Alternate locations are Albany, NY, Essex Junction, VT, or remote locations.
Strong experience using the Cadence Virtuoso layout design tool, at least 3 years.
Experience with Cadence Skill programming language, at least 2 years
Basic understanding of physical layout, technology groundrules, and semiconductor processing.
Ability to debug errors and solve problems.
Ability to work in a team environment.
Fluent English (both verbal and written) and strong communication skills