Hardware Design Engineer

Description

Today, Electronic Warfare (EW) is a growing enterprise - protecting the warfighter and our national security against ever-adapting threats. The Leidos Innovations Center (LInC) at Leidos currently has an opening for a mid-level hardware design engineer to support a portfolio of programs in San Diego developing state-of-the-art hardware architectures such as system-on-chip (SoC). As an Hardware Architect, you will join a highly collaborative, multi-disciplinary team of signal processing and software engineers who are developing leading-edge, cyber-resilient hardware processor solutions.

The selected individual will support activities throughout the entire hardware design lifecycle to include post-fabrication integration and test. He/she is expected to perform a wide range of functions to include conceptual design, system engineering, hardware/software integration, and validation. The selected individual must possess a strong understanding of hardware components and radio frequency (RF) hardware for use in embedded systems. This includes application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA), digital signal processors (DSP), and data converters. He/she must also possess a sound knowledge of radar concepts as well as a good understanding of algorithm implementation and hardware/software co-design. Along with program specific technical activities, he/she will also support business development within Leidos’ broader Hardware portfolio. The selected candidate will interact daily with Leidos subcontractors and potential partners within the semiconductor industry.

Primary responsibilities:

• Design, integrate, and test SoCs suited for a diverse array of signal processing applications

• Drive SoC architecture definition through documentation to include preliminary design specifications, system requirements, interface control documents, block diagrams, IP and DFT configurations

• Provide technical guidance and subcontractor oversight throughout SoC design process to include, supervising design activities (RTL, DFT, physical design, verification), integration (packaging), and test (test application/demo)

• Resolve complex issues related to architectural approaches, requirements, specifications and design

• Work closely with a team of software, firmware, and systems engineers to ensure Leidos’ SoCs meet product requirements

• Attend regular customer meetings and lead technical discussions/program reviews to support federal government customers

• Cultivate relationships within the semiconductor industry to support Leidos business strategy

• Keep abreast of SoC technology to influence design decisions, specifically: processors, foundry, trust, intellectual property, standards, trends, tools & methodology

• Interface with the program management team to advance portfolio performance

Basic Qualifications:

• B.S. degree in Computer Science, Engineering, Physics, Mathematics, or related field and 4+ years of prior relevant experience or M.S. degree with 2+ years of prior relevant experience

• Requires on-site work in San Diego, CA

• Secret clearance with ability to obtain Top Secret Clearance

• Experience with SoC technology and components to include ASICs, FPGAs, DSPs, data converters

• Familiarity with SoC design flow to include RTL, DFT, PD, Verification

• Experience developing SoC test plans, executing SoC validation and test, evaluating test results, performing analysis and writing technical reports

• Experience with embedded signal processing algorithms, simulations, models, and/or software for deployment on complex SoCs

• Working knowledge of C/C++ and Linux operating systems

• Well-organized, reliable, attention to detail, demonstrated personal initiative. Ability to multi-task and prioritize workload. Good interpersonal skills and ability to coordinate work with others. Good oral and written communication skills

• 10% travel to customer/subcontractor sites as required

Preferred Qualifications:

• Masters’ degree or higher in Electrical/Computer Engineering with emphasis on digital/ASIC/FPGA design is a plus.

• 2+ years of ASIC and/or FPGA design experience

• Breadth of experience with SoCs and associated hardware to include printed circuit boards (PCBs), FPGAs, and custom ASICs

• Working knowledge of electronics test equipment like function generators, oscilloscopes, logic analyzers, and lab power supplies.

• Hands-on development of low-level embedded system software and device drivers for ASIC or SoC

• Strong understanding of radar theory and fundamentals with experience working in areas of radar modeling and simulation and/or algorithm development

• Demonstrated leadership of a SoC development project

• Experience leading technical proposals or participating in business development strategy

LInC

Electronic Warfare

Original Posting Date:

While subject to change based on business needs, Leidos reasonably anticipates that this job requisition will remain open for at least 3 days with an anticipated close date of no earlier than 3 days after the original posting date as listed above.

Pay Range:

The Leidos pay range for this job level is a general guideline only and not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.